Title Page
Abstract
Contents
Chapter 1. Introduction 19
1.1. Advanced Semiconducting Material: Carbon Nanotube 19
1.2. Inkjet-Printed CNT TFT 23
1.3. Electrical and Optical Stability Issues in CNT TFT 24
1.4. Organization of This Dissertation 27
Chapter 2. Tunable Electrical Stability of Carbon Nanotube Thin-Film Transistors by Using Double Gate Structure 29
2.1. Introduction 29
2.2. Experimental Method 35
2.2.1. Materials 35
2.2.2. Fabrication of CNT TFT 35
2.2.3. Measurements 36
2.3. Result and Discussion 38
2.3.1. All-Inkjet-Printed CNT TFT and Hysteresis Behavior 38
2.3.2. Abnormal Stress Behavior of Passivated CNT TFT 43
2.3.3. Tunable Stability of Double Gate Structured CNT TFT 48
2.4. Conclusion 54
Chapter 3. Photo-Response Analysis of Carbon Nanotube Thin Film Transistors for Transparent, Flexible, and Light-Insensitive Devices Under Daily Sunlight 55
3.1. Introduction 55
3.2. Experimental Method 61
3.2.1. Materials 61
3.2.2. Fabrication of Transparent CNT TFT 61
3.2.3. High-Power Laser and Low-Power Light Sources 62
3.2.4. Measurements 63
3.3. Result and Discussion 64
3.3.1. Photo-Response of Transparent CNT TFT 64
3.3.2. Mechanism Study about Photo-Response of CNT TFT 67
3.3.3. Light-Insensitive CNT TFT Under Daily Sunlight 72
3.4. Conclusion 76
Chapter 4. Applications and Circuit Operation of Carbon Nanotube Thin Film Transistors Under Electrical and Optical Stress 77
4.1. Introduction 77
4.2. Experimental Method 82
4.2.1. Materials 82
4.2.2. Fabrication of CNT TFT 82
4.2.3. Measurements 83
4.2.4. Simulation 83
4.3. Result and Discussion 84
4.3.1. Diode-Connected CNT TFT for Threshold Voltage Sensing 84
4.3.2. P-type Only Inverter Operation by Using Double-Gate-Structured CNT TFT 91
4.3.3. Operation of Transparent, Flexible, and Photo-Insensitive CNT TFT Under Daily Sunlight 95
4.4. Conclusion 101
Chapter 5. Summary 103
5.1. Summary 103
References 107
Publication List 122
Abstract in Korean(국문 초록) 125
Figure 1.1. (a) Transparent and flexible organic transistor[2]. (b) Tunable characteristics of oxide transistors depending on composition ratio[4]. (c) MoS₂ transistor with hBN dielectric. 20
Figure 1.2. Schematic of (a) single/multi-walled CNT and (b) metallic/semiconducting CNT. 21
Figure 1.3. (a,b) Electrical characteristics of CNT-based transistors compared with other semiconducting materials[11, 12]. (c,d) Image of flexible and stretchable CNT TFTs[14,... 22
Figure 1.4. (a) Pressure sensor with CNT transistor[26]. (b) Gas sensor transistor with CNT[28]. (c) Simple computing device with CNT electronics. (d) Display demonstration with CNT. 23
Figure 1.5. (a,b) Image and working mechanism of inkjet printer. [source : HZB, Dimatix] (c,d) Image of CNT inkjet printing for TFT/sensor device fabrication. 24
Figure 1.6. (a) Hysteresis of CNT TFT. (b) Bias stress test result of CNT TFT. (c,d) Threshold voltage shift during gate bias stress test. 25
Figure 1.7. (a) Photo-desorption mechanism and light-stress test of CNT film[38]. (b) Bolometric effect from the light illumination test. 26
Figure 2.1. (a) SEM image of entangled semiconducting CNT film[46]. (b) X & Y junction forming in the entangled semiconducting CNT film. (b) Threshold voltage shift during... 30
Figure 2.2. (a) Reduced hysteresis of CNT TFTs with HfO₂ and Al₂O₃ passivation[49]. (b) Reduced threshold voltage shift with HfO₂, Al₂O₃, and PVA. (c) Reduced cyclic stress... 32
Figure 2.3. (a) Output curve of double gate structured CNT TFT with connected bottom and top gate bias[52]. Transfer curves of double gate structured CNT TFT by varying additional... 33
Figure 2.4. Fabrication process of all-inkjet printed single, PVP passivated, and double gate structure CNT TFTs. 37
Figure 2.5. (a) Optical image of inkjet-printed CNT TFT. Thickness of (b) silver electrode and (c) PVP dielectric layers. 39
Figure 2.6. Fabricated all-inkjet-printed CNT TFT by varying (a) channel printing layers and (b) DS. 39
Figure 2.7. Hysteresis of all-inkjet-printed (a) single gate and (b) PVP passivated CNT TFTs. 40
Figure 2.8. Hysteresis graph and schematic of charge trapping in CNT TFT with (a) PVP dielectric, (b) PVDF-HFP dielectric, and (c) PVDF-HFP dielectric after annealing. 42
Figure 2.9. (a) Schematic and (b) hysteresis graph of CNT TFT without and with PVDF-HFP passivation. 42
Figure 2.10. (a) Transfer curves of unpassivated (black solid line) and PVP passivated (red dotted line) CNT TFTs (b) Transfer curves of unpassivated CNT TFT with 10 V PGBS (c)... 44
Figure 2.11. Schematic of four CNT TFTs. (a) unpassivated CNT TFT with SiO₂ dielectric (b) PVP passivated CNT TFT with SiO₂ dielectric (c) unpassivated CNT TFT with PVP... 45
Figure 2.12. Transfer curves of CNT TFT with 10 V PGBS. (a) unpassivated CNT TFT with SiO₂ dielectric (b) PVP passivated CNT TFT with SiO₂ dielectric (c) unpassivated CNT TFT... 45
Figure 2.13. (a) Normalized on-current and (b) threshold voltage shift of four CNT TFTs with 10 V PGBS. 46
Figure 2.14. Shift of transfer curves with (a) charge trapping and (b) defect state creation. 47
Figure 2.15. Opposite direction stress effect of (a) organic defective transistor [58] and (b) CNT TFT. 48
Figure 2.16. (a) Schematic of double gate structure CNT TFT (b) Optical image of double gate structured, PVP passivated, and unpassivated CNT TFT (c) Transfer curves of double... 49
Figure 2.17. (a) Threshold voltage shift of double gate structured CNT TFTs under 10 V PGBS by varying top gate bias from -1 V to -5 V. (b) Transfer curves of double gate structured... 50
Figure 2.18. (a) Transfer curve of reference CNT TFT. (b) Threshold voltage shift of CNT TFT without passivation, with passivation, and with double gate structure under 10 V PGBS... 52
Figure 2.19. Schematic and transfer curve of (a) PVP passivated bottom gate structured CNT TFT and (b) top gate structured CNT TFT under 10 V PGBS. 53
Figure 2.20. Comparison of (a) normalized on-current and (b) threshold voltage shift between passivated, top gate structured, and double gate structured CNT TFTs. 53
Figure 3.1. (a) Transparent organic transistor array[63]. (b) Transparent IGZO transistor with buckled structure for stretchability[64]. (c) Transparent 2D MoS₂ transistor on flexible... 56
Figure 3.2. (a) Photoleakage behavior in organic transistors varied with brightness of light source[67]. (b) Transfer curves of ZnO transistor under various power/wavelength light... 57
Figure 3.3. (a) Bandgap comparing between high-bandgap material (heptazole) and conventional organic semiconductor (pentacene)[71]. (b) Structure of a-IGZO TFT with... 58
Figure 3.4. (a) Heterojunction structure for photo-sensitive CNT device[85]. (b,c) Photo- desorption mechanism during photo-response of CNT film with UV radiation[84, 45]. (d,e)... 59
Figure 3.5. Power intensity and wavelength of CNT-based photodetectors. 59
Figure 3.6. (a) Transparency of PEN substrate and fully stacked film. (b) Image of fabricated transparent CNT TFTs. 64
Figure 3.7. (a) Schematic and (b) transfer curves of CNT TFT with various dielectric and electrode materials. 66
Figure 3.8. Transfer curves of CNT TFT with (a) 450 nm, (b) 520 nm, and (c) 660 nm laser illumination. (d) Normalized on-current of CNT TFTs with three wavelength laser illumination. 67
Figure 3.9. (a,b) Current degradation of CNT TFTs under 450 nm laser illumination by varying the density of CNT channel. 68
Figure 3.10. (a,b) Photo-response of CNT TFT under 450 nm laser illumination by varying laser power level. 69
Figure 3.11. Photo-response of CNT TFT in Ar atmosphere glove box, before and after annealing. 71
Figure 3.12. Photo-response of CNT film without passivation (black line), with PVP (red line), SEBS (blue line), and Epoxy (purple line) passivation under 450 nm laser illumination. 73
Figure 3.13. (a) Transfer curves and (b) mobility/threshold voltage shift of CNT TFT under low-power level light sources. 74
Figure 3.14. (a) Photo-response of CNT film in the air (solid line) and in the Ar atmosphere glove box (dotted line) with high power (black line) and low power (red line) laser... 75
Figure 4.1. Tuning the polarity of CNT TFT with (a) passivation, (b) double gate structure, and (c) chemical doping. 78
Figure 4.2. Schematic and operation of (a) zero-VGS -load, (b) diode-load inverter, [90] and (c) advanced pseudo-CMOS inverter.[이미지참조] 79
Figure 4.3. Various compensation circuit with diode-connected scheme. (a) 3T compensation circuit[92]. (b) 4T compensation circuit[93]. (c) 5T2C compensation circuit. 80
Figure 4.4. Schematic and voltage saturation of threshold voltage sensing circuit (a) with gate-drain connection and (b) separated biasing. 85
Figure 4.5. (a) Schematic of BSIM-IMG model[95] and (b) matching between inkjet-printed CNT TFT (black line) and simulation (red line). 86
Figure 4.6. (a) Schematic of simulated threshold voltage sensing circuit. (b) Transfer curve of transistor in circuit. (c) Source node voltage and (d) VGS of threshold voltage sensing circuit.[이미지참조] 88
Figure 4.7. (a) Schematic of modified simulated threshold voltage sensing circuit. (b) Transfer curve of transistor in circuit. (c) Source node voltage and (d) VGS of threshold...[이미지참조] 88
Figure 4.8. Schematic of threshold voltage sensing circuit with (a) single gate and (b) double gate structure. VGS of threshold voltage sensing circuit with (c) single gate and (d) double...[이미지참조] 90
Figure 4.9. (a) Schematic of threshold voltage sensing circuit with bias stress. (b) Transfer curves of CNT TFT under bias stress. (c) Source node voltage and (d) calculated VTH from...[이미지참조] 90
Figure 4.10. Schematic of p-type only inverter with (a) single and (b) double gate structured CNT TFT 91
Figure 4.11. (a) Output, (b) current flow, and (c) gain of p-type only inverter with single (black line) and double (red line) gate structured CNT TFTs. 92
Figure 4.12. Output curves of p-type only inverter with (a) PVP passivated and (b) double gate structured CNT TFT under 10 V PGBS. 93
Figure 4.13. (a) Schematic of simulated compensation circuit. (b) Single transistor and (c) compensated transistor operation with 3.5 V and 5 V threshold voltage. 94
Figure 4.14. (a) Schematic of fabricated compensation circuit. (b) VSₑₙₛₑ and VInv output during stress. (c) Output curve of inverter. (d) transfer curve of transistor during stress.[이미지참조] 95
Figure 4.15. Bending test result of (a) silver electrode, (b) PVP capacitor, and (c) CNT channel. (d) Normalized mobility and threshold voltage shift of CNT TFT under 1000 cycle... 96
Figure 4.16. (a) optical image of PVP island on PDMS substrate. 2D DIC strain distribution image of PVP island on PDMS, under (b) 5%, (c) 10%, (d) 15%, and (e) 20% strain applied.... 97
Figure 4.17. (a) Schematic of transparent, flexible, and light-insensitive inverter circuit with CNT TFTs. (b) Image of transparent inverters. 98
Figure 4.18. (a) Output curves of fabricated inverters. (b) Dynamic operation of fabricated inverters under halogen lamp. 99
Figure 4.19. (a) Fabricated transparent inverter attached on window. (b) Output curves of inverter under daily sunlight, 11:00 to 17:00. 100